1. DDM Description
DDM means digital diagnostic monitoring, define in SFF-8472 documents.
DDM monitors following:
DDM working procedure:
It reads monitoring data and converter analog to digital throught A/D, and write the standardard value or external calibration coefficients into E2ROM.
DDM--SFF-8472 files for reference
The enhanced interface uses the two wire serial bus address 1010001X (A2h) to provide diagnostic information about the module’s present operating conditions.The transceiver generates this diagnostic data by digitization of internal analog signals. Calibration and alarm/warning threshold data is written during device manufacture.
Digital Diagnostic Memory Map Specific Data Field Descriptions
Diagnostics: Data Fields – Address A2h
2. DDM Function
Diagnostics Overview [Address A2h]
2 wire serial bus address 1010001X (A2h) is used to access measurements of transceiver temperature, internally measured supply voltage, TX bias current, TX output power, received optical power, and two additional quantities to be defined in the future.
The values are interpreted differently depending upon the option bits set at address 92. If bit 5 “internally calibrated” is set, the values are calibrated absolute measurements, which should be interpreted according to the section “Internal Calibration” below. If bit 4 “externally calibrated” is set, the values are A/D counts, which are converted into real units per the subsequent section titled “External Calibration”.
Measured parameters are reported in 16 bit data fields, i.e., two concatenated bytes. The 16 bit data fields allow for wide dynamic range. This is not intended to imply that a 16 bit A/D system is recommended or required in order to achieve the accuracy goals stated below. The width of the data field should not be taken to imply a given level of precision. It is conceivable that the accuracy goals herein can be achieved by a system having less than 16 bits of resolution. It is recommended that any low-order data bits beyond the system’s specified accuracy be fixed at zero. Overall system accuracy and precision will be vendor dependent.
To guarantee coherency of the diagnostic monitoring data, the host is required to retrieve any multi-byte fields from the diagnostic monitoring data structure (IE: Rx Power MSB - byte 104 in A2h, Rx Power LSB - byte 105 in A2h) by the use of a single two-byte read sequence across the two-wire interface.
The transceiver is required to ensure that any multi-byte fields which are updated with diagnostic monitoring data (e.g. Rx Power MSB - byte 104 in A2h, Rx Power LSB - byte 105 in A2h) must have this update done in a fashion which guarantees coherency and consistency of the data. In other words, the update of a multi-byte field by the transceiver must not occur such that a partially updated multi-byte field can be transferred to the host. Also, the transceiver shall not update a multi-byte field within the structure during the transfer of that multi-byte field to the host, such that partially updated data would be transferred to the host.
Accuracy requirements specified below shall apply to the operating signal range specified in the relevant standard. The manufacturer’s specification should be consulted for more detail on the conditions under which the accuracy requirements are met.
Measurements are calibrated over vendor specified operating temperature and voltage and should be interpreted as defined below. Alarm and warning threshold values should be interpreted in the same manner as real time 16 bit data.Converted analog values. Calibrated 16 bit data.
Measurements are raw A/D values and must be converted to real world units using calibration constants stored in EEPROM locations 56 – 95 at 2 wire serial bus address A2h. Calibration is valid over vendor specified operating temperature and voltage. Alarm and warning threshold values should be interpreted in the same manner as real time 16 bit data.
Alarm and Warning Flags [Address A2h, Bytes 112-117]
Bytes 112 – 117 contain an optional set of alarm and warning flags. The flags may be latched or non-latched. Implementation is vendor specific, and the vendor’s specification sheet should be consulted for details. It is recommended that in either case, detection of an asserted flag bit should be verified by a second read of the flag at least 100ms later. For users who do not wish to set their own threshold values or read the values in locations 0 - 55, the flags alone can be monitored. Two flag types are defined.
Alarm and Warning Thresholds
Alarm and Warning Flag Bits
3. DS1859 realize DDM
The DS1859 dual, temperature-controlled, nonvolatile (NV) variable resistors with three monitors consists of
two 50kΩ or two 20kΩ, 256-position, linear, variable resistors; three analog monitor inputs (MON1, MON2,
MON3); and a direct-to-digital temperature sensor. The device provides an ideal method for setting and temperature-compensating bias voltages and currents in control applications using minimal circuitry. The variable resistor settings are stored in EEPROM memory and can be accessed over the 2-wire serial bus.
Memory Organization, ADEN = 1
If the ADEN bit is 1, additional 128 bytes of EEPROM are accessible through the Main Device, selected as Table 00 (see Figure 3). In this configuration, the Auxiliary Device is not accessible. APEN controls the protection of Table 00 regardless of ADEN’s setting. ADFIX (address fixed) determines whether the Main
Device address is determined by an EEPROM byte (Table 01, byte 8Ch, when ADFIX = 1). There can be
up to 128 devices sharing a common 2-wire bus, with each device having its own unique device address.